How virtual machines work

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Published Date:22-07-2017
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Virtual Machines Sorav BansalVirtualization Providing a hardware-like view to each process or Running an OS inside another OS or Running multiple OSes on single physical hardware Emulating a physical machine in softwareTraditional Picture Application Application 1 2 OS HardwareVirtualized Picture App App App App Guest OS 1 Guest OS 2 Virtual Hardware Virtual Hardware Virtual Machine Monitor (VMM) HardwareThis Lecture • Why? – Applications of Virtualization • How? – Binary translation – Memory virtualization – Device emulation (Disk, NIC, …) • Looking ahead…Advantages of Virtualization • Server consolidation • Best of all worlds – e.g., run Windows and Linux simultaneously • Complete isolation between applications – e.g., Internet VM and development VM (desktop) – e.g., Mail server VM and print server VM (server) • Encapsulation (a VM is just a file) – e.g., snapshotting • New Applications: Security, Reproducibility, Monitoring, Migration, Legacy systems, …How it works? 1. Interpretation (e.g., bochs) – Interpret each instruction and emulate it • e.g., Each instruction is implemented by a C function – incl (%eax): » r = regsEAX; » tmp = read_mem(r); » tmp++; » write_mem(r, tmp); – Slowdown? 50x 2. Binary Translation (e.g., qemu) – Translate each guest instruction to the minimal set of host instructions required to emulate it • e.g.: – incl (%eax) » leal mem0(%eax), %esi » incl (%esi) – Advantages • Avoid function-call overhead of interpreter-based approach • Can re-use translations by maintaining a translation cache – Slowdown? 5-10xHow it works? (..contd) • VMM: Direct execution whenever possible, binary translate otherwise – reg-reg instructions. e.g., movl %eax, %ecx • always possible – reg-mem instructions. e.g., movl (%eax), %ecx • Need “Memory Virtualization” (next slide) – I/O instructions. e.g., in %eax • No Need binary translation • In most cases, the instruction is trying to access a device. Need to emulated the device in software • DMA requests handled similarly – Traps? • Trap in the VMM, take control of the situation and trap to guest OS if needed – Interrupts? • Deliver interrupts to guest OS at safe instruction boundaries – Slowdown? 0-50%, typically 20%... goodVirtual Machine Monitor (VMM) App App App App App App OS OS OS VMM Hardware Old Idea (1960s) : IBM Mainframes Was a good idea for expensive hardware at that timeVirtual Machine Monitors • Popek, Goldberg 1974 – An architecture is virtualizable if the set of instructions that could affect the correct functioning of the VMM are a subset of the privileged instructions • i.e., all sensitive instructions must always pass control to the VMM • x86 was not designed to be virtualizable – VMware Solution • Binary translate sensitive instructions to force them to trap into VMM • Most instructions execute identically • Intel VT and AMD-V (2008) – Support for virtualization in hardware for x86 – Obey the principles required to make hardware virtualizable – Hence, on modern machines, we no longer require binary translationVirtual Machine Monitor • Hardware Support (IBM Mainframes 1960s, Intel VT/AMD-V 2006) – Simple and fast to develop – Expected to be faster • Binary Translation (VMware 1998) – More flexible – Often faster • ParaVirtualization (Xen 2003) – Much more efficient – But… can only run a particular kernel (modified version of Linux) on itOutline • CPU Background • Virtualization Techniques – System ISA Virtualization – Instruction Interpretation – Trap and Emulate – Binary Translation – Hybrid ModelsComputer System Organization Memory CPU MMU Controller Local Bus Interface High-Speed I/O Bus Frame NIC Controller Bridge Buffer LAN Low-Speed I/O Bus CD-ROM USB Slide Author: Scott DevineCPU Organization • Instruction Set Architecture (ISA) Defines: – the state visible to the programmer • registers and memory – the instruction that operate on the state • ISA typically divided into 2 parts – User ISA • Primarily for computation – System ISA • Primarily for system resource management Slide Author: Scott DevineUser ISA - State Special-Purpose Registers Program Counter Condition Codes General-Purpose Floating Point User Virtual Registers Registers Memory Reg 0 FP 0 Reg 1 FP 1 Reg n-1 FP n-1 Slide Author: Scott DevineUser ISA – Instructions Control Typical Instruction Pipeline Flow Integer Fetch Decode Registers Issue Memory FP Integer Memory Control Flow Floating Point Add Load byte Jump Add single Sub Load Word Jump equal Mult. double And Store Multiple Call Sqrt double Compare Push Return … … … … Instruction Groupings Slide Author: Scott DevineSystem ISA • Privilege Levels User • Control Registers System • Traps and Interrupts – Hardcoded Vectors – Dispatch Table • System Clock User • MMU Extension Kernel – Page Tables Level 0 – TLB Level 1 Level 2 • I/O Device Access Slide Author: Scott DevineOutline • CPU Background • Virtualization Techniques – System ISA Virtualization – Instruction Interpretation – Trap and Emulate – Binary Translation – Hybrid Models Slide Author: Scott DevineIsomorphism e(S ) i S S i j Guest V(S ) V(S ) i j e’(S’) i S ’ S ’ i j Host Formally, virtualization involves the construction of an isomorphism from guest state to host state. Slide Author: Scott DevineVirtualizing the System ISA • Hardware needed by monitor – Ex: monitor must control real hardware interrupts • Access to hardware would allow VM to compromise isolation boundaries – Ex: access to MMU would allow VM to write any page • So… – All access to the virtual System ISA by the guest must be emulated by the monitor in software. – System state kept in memory. – System instructions are implemented as functions in the monitor. Slide Author: Scott Devine

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